Pin Multiplexing - Fujitsu MB86R02 Jade-D Hardware Manual

MB86R02 'Jade-D' Hardware Manual V1.64
1.5.2 Pin Multiplex
In order to maintain a smaller pin count despite full hardware functionality, MB86R02 'Jade-D' uses
pin multiplexing. This means that in a specific pin multiplex mode, certain package pins are internally
rerouted (shared between different units) so that their external functionality is changed. Package pins
are categorized into different modes (tables), which are configured using various pin multiplex
functions.
Pin Multiplex Overview
Pin multiplex mode #0
Dependancies: setting of register
• First MUX Function: Pins related to Display1
• Second MUX Function: Pins related to external bus 32 bit interface
• Third MUX Function: Pins related to Display1
Pin multiplex mode #1
Dependancies: setting of register:
• First MUX Function: Pins related to Capture0, Capture1
• Second MUX Function: Pins related to Capture0, Capture1
• Third MUX Function: Pins related to external bus 32 bit interface
Pin multiplex mode #2
Dependancies: setting of registers:
• First MUX Function: Pins related to UART0
• Second MUX Function: Pins related to GPIO
• Third MUX Function: Pins related to UART0, UART3
• Fourth MUX Function: Pins related to Memory NAND flash
Pin multiplex mode #3
Dependancies: setting of register:
• First MUX Function: Pins related to JTAG Tracing
• Second MUX Function: Pins related to PWM
Pin multiplex mode #4
Dependancies: setting of register:
• First MUX Function: Pins related to DISP0
• Second MUX Function: Pins related to DISP0, APIX SB0
• Third MUX Function: Pins related to APIX SB0, GPIOx18
• Fourth MUX Function: Pins related to GPIOx24
1-22
ing
[vth1]
MPX_MODE_1[1:0]
MPX_MODE_1[1:0]
CMPX_MODE_9[1:0] and
CMPX_MODE_2[1:0] and
MPX_MODE_5[1]
MPX_MODE_5[0]
CMPX_MODE_2[1:0]