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MB86R02 'Jade-D' Hardware Manual V1.64
IFSR (Input FIFO Status Register)
Register
DrawBaseAddress + 404
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This is a mirror register for bits 14 to 12 of the CTR register.
IFCNT (Input FIFO Counter)
Register
DrawBaseAddress + 408
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This is a mirror register for bits 19 to 15 of the CTR register.
SST (Setup engine Status)
Register
DrawBaseAddress + 40C
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This is a miller register for bits 9 to 8 of the CTR register.
DST (DDA Status)
Register
DrawBaseAddress + 410
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This is a mirror register for bits 5 to 4 of the CTR register.
PST (Pixel engine Status)
Register
DrawBaseAddress + 414
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This is a mirror register for bits 1 to 0 of the CTR register.
EST (Error Status)
Register
DrawBaseAddress + 418
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This is a mirror register for bits 24 to 22 of the CTR register.
H
H
H
H
H
H
NF FF FE
R R R
0 0 1
FCNT
R
011101
SS
R
00
DS
RW
00
PS
R
00
FO PE CE
RW RW RW
0 0 0
18-209
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