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MB86R02 'Jade-D' Hardware Manual V1.64
9.5.12 Interrupt control register (ICR31-ICR00)
The ICR31 to ICR00 register can be supplied to each IRQ interrupt source, and set the interrupt level
of the corresponding IRQ interrupt source. The IRQ interrupt source can certain the mask when the
ILM register is larger than the set value (Interrupt level of ICR register <= Interrupt level of ILM
register).
FFFF_FE00
Address
FFFF_FE00
Bit
31
30
29
Name
-
-
-
R/W
R/W
R/W
R/W
Initial value
X
X
X
Bit
15
14
13
Name
-
-
-
R/W
R/W
R/W
R/W
Initial value
X
X
X
Bit field
Num
Name
ber
31-4
-
IRC0:
or FFFE_8000
+ 30
H
H
H
|
or FFFE_8000
+ AC
H
H
H
28
27
26
25
-
-
-
-
R/W
R/W
R/W
R/W
X
X
X
X
12
11
10
9
-
-
-
-
R/W
R/W
R/W
R/W
X
X
X
X
It is an unused bit.
The write access is ignored. The read value of these bits is undefined.
IRC1: FFFB_0000
IRC2: FFFB_1000
24
23
22
21
-
-
-
-
R/W
R/W
R/W
R/W
X
X
X
X
8
7
6
5
-
-
-
-
R/W
R/W
R/W
R/W
X
X
X
X
Explanation
--
+ 30
FFFB_0000
+ AC
H
H
H
H
--
+ 30
FFFB_1000
+ AC
H
H
H
H
20
19
18
17
-
-
-
-
R/W
R/W
R/W
R/W
X
X
X
X
4
3
2
1
-
ICR3 ICR2 ICR1 ICR0
R/W
R/W
R/W
R/W
X
1
1
1
16
-
R/W
X
0
R/W
1
9-25
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