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MB86R02 'Jade-D' Hardware Manual V1.64
GMDR1E (Geometry Mode Register for Line Extension)
Register
(SetGModeRegister)
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
PO LV
R/W
W W
Initial value
0 0
This register sets the geometry processing extended mode at line drawing.
The MB86R02 'Jade-D' extended function can be used only when the C, Z and ST fields of GMDR0 are "0".
This register is a mirror with GMDR1, so that if GMDR1E is changed, the same bit of GMDR1 is
also changed.
Bit 31
PO (Primitive Order Control)
Sets the draw order for body/edge/shadow
0
Body -> Edge -> shadow (faster)
Shadow -> Edge -> Body (quality for anti-alias)
1
Bit 30
LV (Line Version Control)
Sets the MB86R02 'Jade-D' Line algorithm version
0
Version 1.0 (for backward compatibility)
Version 2.0 (recommended)
1
Bit 20
TC (Thick line Correct)
Sets the interpolation mode for the bold line joint
0
Interpolation of bold line joint not performed
Interpolation of bold line joint performed
1
Bit 16
BC (Broken line Correct)
Sets the interpolation mode for the dashed-line pattern
0
Interpolation not performed
Interpolation performed using dashed-line pattern reference address fixed mode
1
Bit 14
UW (Uniform line Width)
Sets the line width equalization mode
0
Equalization of line width not performed
Equalization of line width performed
1
Bit 13
BM (Broken line Mode)
Sets the dashed-line pattern mode
0
Dashed-line pattern pasted vertical to principal axis of line (compatible with
CREMSON).
1
Dashed-line pattern pasted vertical to theoretical line
Bit 12
TM (Thick line Mode)
Sets the bold line mode
0
Bold line drawn vertical to principal axis of line (compatible with CREMSON)
TC
BC
TM
UW BM
W
W
W W W
0
0
0 0 0
BP SP
BO
EP
W W
W
W
0 0
0
0
18-241
AA
W
0
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