Remap Control Register (Rbremap) - Fujitsu MB86R02 Jade-D Hardware Manual

MB86R02 'Jade-D' Hardware Manual V1.64
8.5.2

Remap control register (RBREMAP)

The Remap control register (RBREMAP) controls the remap state. Once a remap has been
carried out, its state remains until it is reset. Write operation to this register is valid only once
after reset, a second or subsequent write is ignored.
This register is reset by the HRESETn input.
This register should be accessed in word accesses.
Address
Bit 31 30 29
Name
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0
Bit 15 14 13
Name
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0
Bit field
No. Name
31-1 (Reserved)
0 REMAP
8-4
GPR0: FFFE_6000
28 27 26 25
0 0 0 0
12 11 10 9
0 0 0 0
Reserved bit.
Remap state is controlled.
When a write operation to remap register is performed (both "0" and "1" of write data
are available) the REMAP output signal becomes high.
The BusMatrix is designed to remap the memory map after the REMAP output signal.
REMAP = Low: Vector area is allocated to internal boot ROM
REMAP = High: Vector area is allocated to internal SRAM_1
+ 04
H H
24 23 22 21
(Reserved)
0 0 0 0
8 7 6 5
(Reserved)
0 0 0 0
Description
20 19 18 17
0 0 0 0
4 3 2 1
REM
AP
0 0 0 0
16
0
0
0