Table of Contents
Advertisement
MB86R02 'Jade-D' Hardware Manual V1.64
L0OA (L0 layer Origin Address)
Register
DisplayBaseAddress + 0x24
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This register sets the origin address of the logic frame of the L0 layer. Since lower 4 bits are fixed
at "0", address 16-byte-aligned.
L0DA (L0-layer Display Address)
Register
DisplayBaseAddress + 0x28
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This register sets the display origin address of the L0 layer. For the direct color mode (16 bits/pixel),
the lower 1 bit is "0" and this address is treated as being aligned in 2 bytes.
L0DX (L0-layer Display position X)
Register
DisplayBaseAddress + 0x2C
address
Bit number
15
Bit field name
Reserved
R/W
Initial value
This register sets the display starting position (X coordinates) of the L0 layer on the basis of the
origin of the logic frame in pixels.
L0DY (L0-layer Display position Y)
Register
DisplayBaseAddress + 0x2E
address
Bit number
15
Bit field name
Reserved
R/W
Initial value
This register sets the display starting position (Y coordinates) of the L0 layer on the basis of the
origin of the logic frame in pixels.
14
13
12
11
10
R0
0
14
13
12
11
10
R0
0
L0OA
RW
X
L0DA
RW
X
9
8
7
6
5
L0DX
RW
X
9
8
7
6
5
L0DY
RW
X
RW0
4
3
2
1
0
4
3
2
1
0
18-75
Advertisement
Table of Contents
