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MB86R02 'Jade-D' Hardware Manual V1.64
13.6.15
IO buffer setting OCD (DRIBSOCD)
Each setting used at impedance adjustment of IO buffer is proceeded.
Address
Bit
15
14
13
Name
-
-
-
R/W
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value
X
X
X
Bit field
No.
Name
15-5
(Reserved)
4
AFORCE
3
ADRV
2
OCDPOL
1
DIMMCAL
0
OCDCNT
13-20
12
11
10
9
-
-
-
-
X
X
X
X
Reserved bits.
Write access is ignored.
This is control bit to switch IO driver's A input, and "1" is set at impedance adjustment.
Initial value is 0.
When this bit is "1", ADRV bit value of bit 3 is added to driver input A of IO buffer.
Be sure to set "0" at the normal operation.
This bit combines with AFORCE of bit 4 to use. When AFORCE is "1", this bit value
becomes IO driver's A input.
When AFORCE is 0, it is don't care.
This becomes OCDPOL value of IO buffer.
Initial value is 0.
This becomes DIMMCAL value of IO buffer.
Initial value is 0.
This becomes OCDCNT value of IO buffer.
Initial value is 0.
F300_0000
+ 66
H
H
8
7
6
5
-
-
-
-
X
X
X
X
Description
4
3
2
1
AFORCE ADRV OCDPOL DIMMCAL OCDCNT
0
0
0
0
0
0
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