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MB86R02 'Jade-D' Hardware Manual V1.64
Pad 7 delay: 0b=no delay, 1b= half bit clock cycle delay
Bit 7
InOut7
output enable control, 0b=input enabled, 1b=output enabled
Bit 6
NPolarity7
N-pin of Padcell 7 drive polarity: TTL: 0=normal, 1=inverted; RSDS: no effect
Bit 5
Polarity7
Pad 7 drive polarity: TTL: 0=normal, 1=inverted; RSDS: 1=normal, 0=inverted
Bit 4
Mode7
Pad 7 drive mode: 0b=differential, 1b=TTL
Bit 1 - 0
Boost7
Boost factor for drive current: x0b=2mA, x1b=4mA (only boost[0] has effect)
DIR_PIN8_CTRL
Register
BaseAddress + 554
H
address
Bit
31 30 29 28 27 26 25 24 23 22 21 20
number
Field
name
R/W
Reset
value
IO Module Pad 8 Control
Bit 20 -
NChanSel8
19
Channel selection for N-Pin of Pad i=8 TTL: 00b=channel(i*2+1), 01b=channel(i*2), 10b=clk, 11b=const0 (TTL mode only)
Bit 18 -
ChanSel8
17
Channel selection for Pad i=8 for RSDS: 00b=channel i, 01b=channel(i-1), 10b=clk, 11b=const0, for TTL: 00b=channel i*2,
01b=channel i*2-1, 10b=clk, 11b=const0
Bit 14
NDelay8
N-pin Padcell 8 delay: 0b=no delay, 1b= half bit clock cycle delay (TTL-mode only)
Bit 13
Delay8
Pad 8 delay: 0b=no delay, 1b= half bit clock cycle delay
Bit 7
InOut8
output enable control, 0b=input enabled, 1b=output enabled
Bit 6
NPolarity8
N-pin of Padcell 8 drive polarity: TTL: 0=normal, 1=inverted; RSDS: no effect
Bit 5
Polarity8
Pad 8 drive polarity: TTL: 0=normal, 1=inverted; RSDS: 1=normal, 0=inverted
Bit 4
Mode8
Pad 8 drive mode: 0b=differential, 1b=TTL
Bit 1 - 0
Boost8
Boost factor for drive current: x0b=2mA, x1b=4mA (only boost[0] has effect)
DIR_PIN9_CTRL
Register
BaseAddress + 558
H
address
Bit
31 30 29 28 27 26 25 24 23 22 21 20
number
Field
name
R/W
Reset
value
IO Module Pad 9 Control
Bit 20
NChanSel9
- 19
Channel selection for N-Pin of Pad i=9 TTL: 00b=channel(i*2+1)(reserved for 6bit/color!), 01b=channel(i*2)(reserved for 6bit/color!),
10b=clk, 11b=const0 (TTL mode only)
Bit 18
ChanSel9
- 17
Channel selection for Pad i=9 for RSDS: 00b=channel i(reserved for 6bit/color!), 01b=channel(i-1), 10b=clk, 11b=const0, for TTL :
00b=channel i*2(reserved for 6bit/color!), 01b=channel i*2-1, 10b=clk, 11b=const0
Bit 14
NDelay9
N-pin Padcell 9 delay: 0b=no delay, 1b= half bit clock cycle delay (TTL-mode only)
Bit 13
Delay9
Pad 9 delay: 0b=no delay, 1b= half bit clock cycle delay
Bit 7
InOut9
output enable control, 0b=input enabled, 1b=output enabled
Bit 6
NPolarity9
N-pin of Padcell 9 drive polarity: TTL: 0=normal, 1=inverted; RSDS: no effect
Bit 5
Polarity9
Pad 9 drive polarity: TTL: 0=normal, 1=inverted; RSDS: 1=normal, 0=inverted
Bit 4
Mode9
Pad 9 drive mode: 0b=differential, 1b=TTL
Bit 1 -
Boost9
0
Boost factor for drive current: x0b=2mA, x1b=4mA (only boost[0] has effect)
DIR_PIN10_CTRL
22-26
19
18
17 16 15
14
NChanSel8 ChanSel8
NDelay8 Delay8
RW
RW
RW
0
0
0
H
H
H
19
18
17 16 15
14
NChanSel9 ChanSel9
NDelay9 Delay9
RW
RW
RW
0
0
0
H
H
H
13
12 11 10 9 8
7
6
InOut8 NPolarity8 Polarity8 Mode8
RW
RW
RW
0
0
0
H
H
H
13
12 11 10 9 8
7
6
InOut9 NPolarity9 Polarity9 Mode9
RW
RW
RW
0
0
0
H
H
H
5
4
3 2 1
0
Boost8
RW
RW
RW
0
1
0
H
H
H
5
4
3 2 1
0
Boost9
RW
RW
RW
0
1
0
H
H
H
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