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MB86R02 'Jade-D' Hardware Manual V1.64
7.4.8 GPIO interrupt polarity setting register (CGPIO_IP)
This register controls the polarity detection type for GPIO interrupts.
The register takes effect regardless of the input/output situation at the time it is set.
Each bit that can be set corresponds to an interrupt that can be configured.
Address
Bit
31
30
29
Name
(Reserved)
R0/W
R0/W
R0/W
R/W
0
0
0
Initial value 0
0
0
Bit
15
14
13
Name
GPIO_INT_polarity[15:0]
R/W
R/W
R/W
R/W
Initial value 0
0
0
Bit field
Number
Name
31-24
(Reserved)
23-0
GPIO_INT_polarity
(GPIO interrupt
polarity)
7.4.9 GPIO interrupt mode setting register (CGPIO_IM)
This register controls the level/edge mode detection type for GPIO interrupts.
The register takes effect regardless of the input/output situation at the time it is set.
Each bit that can be set corresponds to an interrupt that can be configured.
Address
Bit
31
30
29
Name
(Reserved)
R0/W
R0/W
R0/W
R/W
0
0
0
Initial value 0
0
0
Bit
15
14
13
Name
GPIO_INT_mode[15:0]
R/W
R/W
R/W
R/W
Initial value 0
0
0
Bit field
Number
Name
31-16
(Reserved)
FFF4_2000 + 20h
28
27
26
25
R0/W
R0/W
R0/W
R0/W
0
0
0
0
0
0
0
0
12
11
10
9
R/W
R/W
R/W
R/W
0
0
0
0
Reserved
Writes are ignored. Reads will return a '0' at all times.
An interrupt occurs according to the following values.
0
Detect on level "0" or negative edge (depends on GPIO_INT_mode)
1
Detect on level "1" or positive edge (depends on GPIO_INT_mode)
FFF4_2000 + 24h
28
27
26
25
R0/W
R0/W
R0/W
R0/W
0
0
0
0
0
0
0
0
12
11
10
9
R/W
R/W
R/W
R/W
0
0
0
0
Reserved
24
23
22
21
GPIO_INT_polarity[23:16]
R0/W
R/W
R/W
R/W
0
0
0
0
0
8
7
6
5
R/W
R/W
R/W
R/W
0
0
0
0
Function
24
23
22
21
GPIO_INT_mode[23:16]
R0/W
R/W
R/W
R/W
0
0
0
0
0
8
7
6
5
R/W
R/W
R/W
R/W
0
0
0
0
Function
20
19
18
17
R/W
R/W
R/W
R/W
0
0
0
0
4
3
2
1
R/W
R/W
R/W
R/W
0
0
0
0
20
19
18
17
R/W
R/W
R/W
R/W
0
0
0
0
4
3
2
1
R/W
R/W
R/W
R/W
0
0
0
0
16
R/W
0
0
R/W
0
16
R/W
0
0
R/W
0
7-13
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