Fujitsu MB86R02 Jade-D Hardware Manual page 702

MB86R02 'Jade-D' Hardware Manual V1.64
Bit field
No. Name
7-0 DDR1_15-8
24-8
GPDDR1 register's bit field.
This register controls input/output directions of GPIO_PD[15:8] pin.
0 GPIO acts as an input port
1 GPIO acts as an output port
GPIO pin corresponding to this register is as follows:
•
DDR1_15: GPIO_PD[15] pin
•
DDR1_14: GPIO_PD[14] pin
•
DDR1_13: GPIO_PD[13] pin
•
DDR1_12: GPIO_PD[12] pin
•
DDR1_11: GPIO_PD[11] pin
•
DDR1_10: GPIO_PD[10] pin
•
DDR1_9: GPIO_PD[9] pin
•
DDR1_8: GPIO_PD[8] pin
These bits are initialized to "1" by reset.
GPDDR2 register's bit field.
This register controls input/output directions of GPIO_PD[23:16] pin
0 GPIO acts as an input port
1 GPIO acts as an output port
GPIO pin corresponding to this register is as follows:
•
DDR2_23: GPIO_PD[23] pin
•
DDR2_22: GPIO_PD[22] pin
•
DDR2_21: GPIO_PD[21] pin
•
DDR2_20: GPIO_PD[20] pin
•
DDR2_19: GPIO_PD[19] pin
•
DDR2_18: GPIO_PD[18] pin
•
DDR2_17: GPIO_PD[17] pin
•
DDR2_16: GPIO_PD[16] pin
These bits are initialized to "1" by reset.
Description