Fujitsu MB86R02 Jade-D Hardware Manual page 585

Graphics controller
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MB86R02 'Jade-D' Hardware Manual V1.64
ALF (Alpha Factor)
Register
DrawBaseAddress + 488
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This register sets the alpha blending coefficient.
BLP (Broken Line Pattern)
Register
DrawBaseAddress + 48C
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This register sets the broken-line pattern. The bit 1 set in the broken-line pattern is drawn in the
foreground color and bit 0 is drawn in the background color. The line pattern for 1 pixel line is laid
out in the direction of MSB to LSB and when it reaches LSB, it goes back to MSB. The BLPO
register manages the bit numbers of the broken-line pattern. 32 or 24 bits can be selected as the
repetition of the broken-line pattern by the BP bit of the MDR1 register. When 24 bits are selected,
bits 31 to 8 of the BLP register are used.
TBC (Texture Border Color)
Register
DrawBaseAddress + 494
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This register sets the border color for texture mapping.
8 bit color mode:
Bit 7 to 0
BC8 (Border Color)
Sets the 8-bit direct color for the texture border color
16 bit color mode:
Bit 15 to 0
BC16 (Border Color)
Sets the 16-bit direct color for the texture border color
Bit15 is used for controlling a stencil and stencil alpha
BLPO (Broken Line Pattern Offset)
Register
DrawBaseAddress + 3E0
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
R/W
Initial value
This register stores the bit number of the broken-line pattern set to BLP registers, for broken line
drawing. This value is decremented at each pixel drawing. Broken line can be drawn starting from
any starting position of the specified broken-line pattern by setting any value at this register.
When no write is performed, the position of broken-line pattern is sustained.
H
H
BLP
RW
0
H
BC8/16
RW
0
H
A
RW
0
BCR
RW
11111
18-227

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