Multiplex Mode Setting Register (Cmux_Md) - Fujitsu MB86R02 Jade-D Hardware Manual

MB86R02 'Jade-D' Hardware Manual V1.64

7.4.12 Multiplex mode setting register (CMUX_MD)

Address
Bit 31 30 29
Name (Reserved)
R/W R R R
Initial value 0 0 0
Bit 15 14 13
Name (Reserved)
R/W R R R
Initial value 0 0 0
Bit field
Number Name
31-29 (Reserved)
28
CMPX_MODE_11
27-26
CMPX_MODE_10
25-24
CMPX_MODE_9
FFF4_2000 + 30h
28 27 26 25
CMPX_
MODE CMPX_MODE10 CMPX_MODE9
11
R/W R/W R/W R/W
1 1 0 0
12 11 10 9
R R R R
0 0 0 0
Reserved
Writes are ignored. Reads will return a '0' at all times.
Selects the first or second function pin multiplex function of pin multiplex table 11 (see Overview
chapter). Selects SPI master interface 0 or GPIO[23:20].
0 SPI master IF 0 is available at external Pins
GPIO[23:20] is available at eternal Pins (CMPX_MODE2[1]
1
must be '0') (initial value)
Selects the first, second or third pin multiplex function of pin multiplex table 10 (see Overview
chapter). Selects (UART 1, UART2, SPI master interface 1) or (GPIO[19:16], SPI master
interface 1) or SD interface.
Serial input and serial output of UART1 and UART2
00 and SPI master IF 1 available
GPIO16-19 instead of UART1 and UART2, keep SPI
01
master IF 1
10 SD-Card IF available (initial value)
Selects the first, second or third pin multiplex function of pin multiplex table 2 (see Overview
chapter).
Serial input, serial output and flow control signals CTS
00 and RTS of UART0 available
01 GPIO15-12 instead of UART0 available (initial value)
Serial input and serial output of UART0 and UART3
10
are available
24 23 22 21
CMPX_ CMPX_ CMPX_
MODE8 MODE7 MODE6
R/W R/W R/W R/W
1 0 1 0
8 7 6 5
R R R R
0 0 0 0
Function
20 19 18 17
CMPX_
CMPX_MODE3 CMPX_MODE2
MODE4
R/W R/W R/W R/W
0 0 1 0
4 3 2 1
R R R R
0 0 0 0
16
R/W
0
0
R
0
7-19