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MB86R02 'Jade-D' Hardware Manual V1.64
Bit
init
Name
:
ial
reserved
7
0
cfg_upBwMode[1]
6
0
cfg_upBwMode[0]
5
0
reserved
4
0
cfg_upSmpOfst[3]
3
0
cfg_upSmpOfst[2]
2
0
cfg_upSmpOfst[1]
1
0
cfg_upSmpOfst[0]
0
0
Table 17-17 TX config_byte_3
Bit
init
Name
:
ial
reserved
7
1
reserved
6
0
reserved
5
0
reserved
4
1
reserved
3
0
reserved
2
0
reserved
1
0
reserved
0
1
Table 17-18 TX config_byte_4
3
If a setup with the external AShell is used and the external AShell is running with a 62.5 MHz core
clock, then the 62.5MBit/s upstream channel bandwidth for half and low bandwidth mode is not
supported.
17-28
config_byte_3
Description
do not change
APIX PHY (Hard IP): upstream bandwidth mode
configuration
3
00: 62.50
Mbit/s(Full, Half, Low Bandwidth Mode)
01: 41.67 Mbit/s(Full Bandwidth Mode)
11: 20.83 Mbit/s(Half and Low Bandwidth Mode)
10: 31.25 Mbit/s(Full, Half, Low Bandwidth Mode)
Do not change
APIX PHY (Hard IP): upstream sampling point
configuration
0000: optimum sampling point when operating in
62.50 Mbit/s mode
0010: optimum sampling point when operating in
41.67 Mbit/s or 31.25 Mbit/s mode
0100: optimum sampling point when operating in
20.83 Mbit/s mode
config_byte_4
Description
do not change
do not change
do not change
do not change
do not change
do not change
do not change
do not change
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