Read Access - Fujitsu MB86R02 Jade-D Hardware Manual

Graphics controller

Hide thumbs Also See for MB86R02 Jade-D:

Table of Contents

MB86R02 'Jade-D' Hardware Manual V1.64

Read Access

Access from the host CPU to this module can be done using an arbitrarily set address byte

length in a range of 1 to 4 bytes. In addition, the data byte length can be arbitrarily set in a range

of 1 to 16 bytes.

This module adapts its read access actions accordingly by manipulating the wait time of the AHB

bus. The wait and ready states for read accesses can be transmitted via a dummy write CMD

which can be used as for a write action too. The basic format of a read access is shown below.

AB L AB L D B L D B L D B L R /W C N T C N T

AB L [1:0] Addres s B yte L ength : 1-4 B yte

D B L [2:0] D ata B yte L ength : 1-16B yte

R /W R ead or W rite s elec t

C NT [1:0] C ommand for c ontrol by HO S T

The CMD and STATUS bytes are described as follows:

ABL: Address Byte Length as shown by using a 2 bit code for 1 to 4 bytes

DBL: Data Byte Length as shown by using 3 bit code for 1 to 16 bytes

R/W: Specifies read or write. "0" is a read.

The read status is shown by the RxRDY bit. When read processing is completed, "1" is shown in

the RxRDY bit. The host CPU can retrieve the reading data at the correct time by monitoring the

STATUS byte.

(DmyWr it e )

01:1byte 10:2byte 11:3byte 00:4byte

1:W rite 0:R ead

10:R S T other:not R S T

Figure 16-4 Read access

Dummy Writes.

se t CMD_ DBL[ 2 :1 ] - > 0 ,0 ,0

0:R eadS ts 0, 1:R eadS ts 1

0:W riteS ts 0, 1:W riteS ts 1

0:Nor, 1:E R R -R E S P

Nex t Read or Write Reques t (A c c es s )

L ightG DC s ends R eadS ts 0 until

R eadS ts bec omes R eadS ts 1.(R ead