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MB86R02 'Jade-D' Hardware Manual V1.64
11.4 Related pin
Table 11-1 External interface pin
Pin
MEM_EA[24:1]
MEM_XWR[3:0]
MEM_XRD
MEM_XCS[4]
MEM_XCS[2]
MEM_XCS[0]
MEM_ED[31:0]
MEM_RDY
11.5 Supply clock
AHB clock is supplied to external bus interface. Refer to "5. Clock reset generator (CRG)" for
frequency setting and control specification of the clock.
11-2
I/O
No. of pin
O
24
Address bus
Writing enabled
O
4
Upper 2 bits are multiplexed pin
O
1
Reading enabled
O
1
Chip selection for boot operation
O
1
Chip selection
O
1
Chip selection
Data bus
IO
32
Upper 16 bits are multiplexed pin
I
1
Ready input for low-speed device
Function
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