Fifo Construction And Description - Fujitsu MB86R02 Jade-D Hardware Manual

MB86R02 'Jade-D' Hardware Manual V1.64

27.7.4 FIFO construction and description

Simultaneous transfer mode (TXDIS = 0 and RXDIS = 0)
TXDIS = 0 and RXDIS = 0
18 word X 32 bit
W
18 word X 32 bit
R
With setting TXDIS = 0 and RXDIS = 0 of CNTREG register, the mode becomes simultaneous
transfer mode which operates in 66 word × 32 bit transmission FIFO and reception FIFO.
FIFO
R
W
Figure 27-6 Simultaneous transfer mode data flow
SWITCH
To RXFDAT register
From reception pin
From TXFDAT register
To transmission pin
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