Line Status - Fujitsu MB86R02 Jade-D Hardware Manual

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MB86R02 'Jade-D' Hardware Manual V1.64

28.7.6 Line status

THRE flag and TEMT flag
Operation example of THRE flag and TEMT flag of bit 5 and 6 in the Line status register (LSR) is
shown in Figure 28-7.
D ATA 1
SO UT
( TH RE)
( TEM T)
Tr ansm i ssi on buf f er
W r i t e
D ATA 2
Tr ansm i ssi on
buf f er
CLK
Figure 28-7 Example of operation of THRE flag and TEMT flag
THRE flag = "1" indicates that there is no data in the Transmission FIFO buffer register, and
transmission character is able to be written.
TEMT flag becomes "1" when there is no data in the register and Transmission shift register in the
transmission control part.
Both flags become "0" at writing "0" to transmission FIFO buffer.
D ATA 2
D ATA 3
M ar k st at e
D ATA 3
D ATA 4
D ATA 5
D ATA 4
D ATA 5
28-21

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