Table of Contents
Advertisement
MB86R02 'Jade-D' Hardware Manual V1.64
7.4.6 GPIO interrupt status register (CGPIO_IST)
This register shows the status of the interrupt that relates to GPIO.
Address
Bit
31
30
29
Name
(Reserved)
R0/W
R0/W
R0/W
R/W
0
0
0
Initial value 0
0
0
Bit
15
14
13
Name
GPIO_INT_status[15:0]
R/W
R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0
Initial value 0
0
0
Bit field
Number
Name
31-24
(Reserved)
23-0
GPIO_INT_status
(GPIO interrupt
status)
7.4.7 GPIO interrupt status mask register (CGPIO_ISTM)
This register controls GPIO related interrupts.
It is used to mask the interrupt status of each GPIO interrupt. The register takes effect regardless of
the input/output situation at the time it is set.
Each bit that can be set corresponds to an interrupt that can be masked.
Address
Bit
31
30
29
Name
(Reserved)
R0/W
R0/W
R0/W
R/W
0
0
0
Initial value 0
0
0
Bit
15
14
13
Name
GPIO_INT_enable[15:0]
R/W
R/W
R/W
R/W
Initial value 0
0
0
Bit field
Number
Name
FFF4_2000 + 18h
28
27
26
25
R0/W
R0/W
R0/W
R0/W
0
0
0
0
0
0
0
0
12
11
10
9
0
0
0
0
Reserved
Writes are ignored. Reads will return a '0' at all times.
Clear by writing '0'.
Indicates a GPIO interrupt.
0
No interrupt occurred.
1
Interrupt occurred.
FFF4_2000 + 1Ch
28
27
26
25
R0/W
R0/W
R0/W
R0/W
0
0
0
0
0
0
0
0
12
11
10
9
R/W
R/W
R/W
R/W
0
0
0
0
24
23
22
21
GPIO_INT_status[23:16]
R0/W
R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0
0
0
0
0
0
8
7
6
5
0
0
0
0
Function
24
23
22
21
GPIO_INT_enable[23:16]
R0/W
R/W
R/W
R/W
0
0
0
0
0
8
7
6
5
R/W
R/W
R/W
R/W
0
0
0
0
Function
20
19
18
17
0
0
0
0
4
3
2
1
0
0
0
0
20
19
18
17
R/W
R/W
R/W
R/W
0
0
0
0
4
3
2
1
R/W
R/W
R/W
R/W
0
0
0
0
16
0
0
0
16
R/W
0
0
R/W
0
7-11
Advertisement
Table of Contents
