Location In The Device; Operation; Reset Generation - Fujitsu MB86R02 Jade-D Hardware Manual

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MB86R02 'Jade-D' Hardware Manual V1.64

Configuration of PLL pre and feedback divider by CRIPM mode pins supports only a dedicated set of

reference frequencies, see Table 5-3

5.4 Location in the device

External clock from pin

External reset from pin

This section describes the operation of the CRG unit.

The following reset sources exist:

1. External reset (XRST pin input)

The entire chip is initialized by a reset input from the external pin XRST.

2. Software reset (reset via register control)

Configuration IF

Figure 5-1 CRG location in the device

Internal reset