MB86R02 'Jade-D' Hardware Manual V1.64
6.4.1.3 Parameter setting for SSCG-speed of 35KHz
Given:
SSCG_ FREQUENCY_OFFSET = 0(default),
SSCG_PEAK = 0(default)
SSCG_PERIOD_JITTER = 10 %(default)
SSCG_TYPE
SSCG_PERIOD
3
Center spread
2
Upspread
1
Downspread
Table 6-5 SSCG speed of 35KHz (refer to 666MHz PLL clock)
6.4.1.4 Parameter setting for SSCG-speed of 50KHz
Given:
SSCG_ FREQUENCY_OFFSET = 0(default)
SSCG_PEAK = 0(default)
SSCG_PERIOD_JITTER = 10 %(default)
SSCG_TYPE
SSCG_PERIOD
3
Center spread
2
Upspread
1
Downspread
Table 6-6 SSCG speed of 50KHz (refer to 666MHz PLL clock)
6-10
SSCG_PERIOD_JITTER
0x49
0x3B
0x49
0x3B
0x49
0x3B
SSCG_PERIOD_JITTER
0x33
0x29
0x33
0x29
0x33
0x29
Modulation Peak %
SSCG_STEP
0.5
0x1 04EB
1.0
0x209D6
1.5
0x3 0EC1
2.0
0x4 13AC
2.5
0x5 1897
3.0
0x6 1D82
0.5
1.0
0x1 04EB
1.5
0x1 875F
2.0
0x209D6
2.5
0x2 8C49
3.0
0x3 0EC1
0.5
1.0
0x1 04EB
1.5
0x1 875F
2.0
0x209D6
2.5
0x2 8C49
3.0
0x3 0EC1
Modulation Peak %
SSCG_STEP
0.5
0x1 75A8
1.0
0x2 EB50
1.5
0x460F8
2.0
0x5D6A1
2.5
0x74C49
3.0
0x8C1F1
0.5
1.0
0x1 75A8
1.5
0x2 307C
2.0
0x2 EB50
2.5
0x3 A624
3.0
0x460F8
0.5
1.0
0x1 75A8
1.5
0x2 307C
2.0
0x2 EB50
2.5
0x3 A624
3.0
0x460F8
0x8275
0x8275
0xBAD4
0xBAD4