Odt Setting Procedure - Fujitsu MB86R02 Jade-D Hardware Manual

MB86R02 'Jade-D' Hardware Manual V1.64
13.7.2.3

ODT Setting Procedure

The figure below is OCD adjustment setting procedure of SSTL_18 IO used for DDR2SDRAM IF.
With proceeding ODT setting, DDR2C automatically adjusts ODT of SSTL_18 IO; moreover, auto.
adjustment always operates during memory reading at normal operation.
Pin for ODT adjustment is MDQ[31:0], MDM[3:0], MDQSP[3:0], and MDQSN[3:0].
Write "0001" to DROBS register (offset + 84h)
Write "0083" to DROABA register (offset + 70h)
Write "003F" to DRIBSODT1 register (offset + 64h)
START
END
Set to the mode using ODT auto. setting
value
ODT auto. adjustment on
Set ODT to on
50Ω/100Ω: "003F"
75Ω/150Ω: "0015"
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