Fujitsu MB86R02 Jade-D Hardware Manual page 872

MB86R02 'Jade-D' Hardware Manual V1.64
t
VINHSYNC0,
SHSI
VINHSYNC1
t
HHSI
t
VINVSYNC0,
SVSI
VINVSYNC1
t
HVSI
t
VINFID0,
SFI
VINFID1
t
HFI
CCLK0, CCLK1
Figure 34-28 Video Capture Clock Input Signal Timing
Input setup time
Input hold Time
Input setup time
Input hold Time
Input setup time
Input hold Time
1/f
CCLK
t
t
HCCLK
LCCLK
5 – –
0 – –
5 – –
0 – –
5 – –
0 – –
ns
ns
ns
ns
ns
ns
34-33