Uart Interface; Outline; Feature; Block Diagram - Fujitsu MB86R02 Jade-D Hardware Manual

Graphics controller
Hide thumbs Also See for MB86R02 Jade-D:
Table of Contents

Advertisement

MB86R02 'Jade-D' Hardware Manual V1.64

28 UART Interface

This chapter describes function and operation of the UART interface.

28.1 Outline

UART is asynchronous transmission/reception serial interface which is controllable by software.
This LSI incorporates 6 UART modules.

28.2 Feature

UART has following features:
• Programmable baud rate (baud rate is selectable arbitrarily based on APB clock)
• 16 byte transmission FIFO and 16 byte reception FIFO

28.3 Block diagram

Figure 28-1 shows block diagram of UART.
MB86R02
IRC_A
XTXRDY
DMAC
XRXRDY
APB bus
CPU I/F
INTR
Figure 28-1 Block diagram of UART
Modem I/F
Register
Receiver
FIFO
shift
Transmitter
FIFO
shift
Baud rate
generator
UART ch0
UART ch1
UART ch5
UART_SIN0
UART_SOUT0
UART_XCTS0
UART_XRTS0
UART_SIN1
UART_SOUT1
UART_SIN5
UART_SOUT5
28-1

Advertisement

Table of Contents
loading

Table of Contents