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Memory Management Unit
TWAM—Tablewalk Assist Mode
0 = 1K subpage hardware assist.
1 = 4K page hardware assist.
PPCS—Privilege/Problem State Compare Mode
0 = Ignore problem/privilege state during address compare.
1 = Consider problem/privilege state according to MD_RPN[24:27].
Bits 7–20—Reserved
These bits are reserved and must be set to 0. Ignored on write and returns a 0 on read.
DTLB_INDX—Data TLB Index
This field acts as a pointer to the data TLB entry to be loaded. It is automatically
decremented at every data translation lookaside buffer update.
Bits 24–31—Reserved
These bits are reserved and must be set to 0. Ignored on write and returns a 0 on read.
11.6.1.3 MMU CURRENT ADDRESS SPACE ID REGISTER. The MMU current address
space ID (M_CASID) register is used to compare the current effective address with the ASID
field in the TLB entry when searching for a matching entry.
M_CASID
BIT
0
1
2
FIELD
RESET
R/W
ADDR
BIT
16
17
18
FIELD
RESET
R/W
ADDR
NOTE: — = Undefined.
Bits 0–27—Reserved
These bits are reserved and must be set to 0. Ignored on a write.
CASID—Current Address Space ID
This field is compared to the ASID field of a TLB entry to qualify a match.
Freescale Semiconductor, Inc.
3
4
5
6
19
20
21
22
RESERVED
—
R
MPC823 REFERENCE MANUAL
For More Information On This Product,
Go to: www.freescale.com
7
8
9
10
11
RESERVED
—
R
SPR 793
23
24
25
26
27
SPR 793
12
13
14
15
28
29
30
31
CASID
—
R/W
MOTOROLA
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