Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1805

Correctable Error Status Register
The
PCIE_CORERR_STAT_[n]
press device Function. When an individual error status bit is Set, it indicates that a particular error occurred; soft-
ware may clear an error status by writing a 1 to the respective bit. Register bits not implemented by the Function are
hardwired to 0.
CORINTL (R/W)
Corrected Internal Error Status
ADVNF (R/W)
Advisory Non Fatal Error Status
RPLYTMO (R/W)
Replay Timer Timeout Status
RPLYNOROLL (R/W)
Replay No Rollover Status
Figure 29-37: PCIE_CORERR_STAT_[n] Register Diagram
Table 29-46: PCIE_CORERR_STAT_[n] Register Fields
Bit No.
(Access)
14 CORINTL
(R/W)
13 ADVNF
(R/W)
12 RPLYTMO
(R/W)
8 RPLYNOROLL
(R/W)
7 BADDLLP
(R/W)
6 BADTLP
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register reports error status of individual correctable error sources on a PCI Ex-
15 14 13 12 11
0 0 0 0 0
31 30 29 28 27
0 0 0 0 0
Bit Name
Corrected Internal Error Status.
Advisory Non Fatal Error Status.
Replay Timer Timeout Status.
Replay No Rollover Status.
Bad DLLP Status.
Bad TLP Status.
10 9 8 7 6 5 4 3
0 0 0 0 0 0 0 0
26 25 24 23 22 21 20 19
0 0 0 0 0 0 0 0
Description/Enumeration
0 No error
1 DLLP status error occurred
0 No error
1 TLP error occurred
ADSP-SC58x PCIE Register Descriptions
2 1 0
0 0 0
RXERR (R/W)
Receiver Error Status
BADTLP (R/W)
Bad TLP Status
BADDLLP (R/W)
Bad DLLP Status
18 17 16
0 0 0
29–101