Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1799

Sharc+ processor
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Bus Multiple Outbound Decomposition SubReq Control Register
The
PCIE_BUS_MULOB_DECOMP_[n]
were derived from decomposition of an outbound memory bus request can occur.
Figure 29-32: PCIE_BUS_MULOB_DECOMP_[n] Register Diagram
Table 29-41: PCIE_BUS_MULOB_DECOMP_[n] Register Fields
Bit No.
(Access)
1:0
SPLTBRST
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register controls whether multiple outstanding non-posted requests that
15
14
0
0
SPLTBRST (R/W)
Enable Bus Multiple Outbound Decomposed
NP SubRequests
31
30
0
0
Bit Name
Enable Bus Multiple Outbound Decomposed NP SubRequests.
When the PCIE_BUS_MULOB_DECOMP_[n].SPLTBRST bit is cleared (=0), the
possibility of having multiple outstanding non-posted requests that were derived from
decomposition of an outbound memory bus request is disabled. You should not clear
this register unless your application master is requesting an amount of read data greater
than Max_Read_Request_Size, and the remote device (or switch) is reordering com-
pletions that have different tags <br><i>Note</i>: This register field is sticky.
13
12
11
10
9
8
7
6
0
0
0
0
0
0
0
0
29
28
27
26
25
24
23
22
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x PCIE Register Descriptions
5
4
3
2
1
0
0
0
0
0
0
1
21
20
19
18
17
16
0
0
0
0
0
0
29–95

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