4.3.1 Writing
Every Low Energy Peripheral has one or more registers with data that needs to be synchronized into the Low Energy clock domain to
maintain data consistency and predictable operation. There are two different synchronization mechanisms on the EFR32, immediate
synchronization, and delayed synchronization. Immediate synchronization is available for the RTCC, LESENSE and LETIMER, and re-
sults in an immediate update of the target registers. Delayed synchronization is used for the remaining Low Energy Peripherals, and for
these peripherals, a write operation requires 3 positive edges of the clock on the Low Energy Peripheral being accessed. Registers
requiring synchronization are marked "Async Reg" in their description header.
Note: On the Gecko series of devices, all LE peripherals are subject to delayed synchronization.
High Frequency Clock Domain
Write request 0
Write request 1
Write request n
Write request [0:n]
Set 0
Set 1
Set n
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High Frequency Clock
Register 0
Register 1
.
.
.
Register n
Clear 0
Syncbusy Register 0
Clear 1
Syncbusy Register 1
.
.
.
Clear n
Syncbusy Register n
Figure 4.11. Write Operation to Low Energy Peripherals
Low Frequency Clock Domain
Freeze
Low Frequency Clock
Synchronizer 0
Synchronizer 1
.
.
.
Synchronizer n
Synchronization Done
Reference Manual
Memory and Bus System
Low Frequency Clock
Register 0 Sync
Register 1 Sync
.
.
.
Register n Sync
Rev. 1.1 | 52
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