Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual page 44

Reference Manual
Memory and Bus System
Figure 4.3. System Address Space With Peripheral Listing
The embedded SRAM is located at address 0x20000000 in the memory map of the EFR32. When running code located in SRAM start-
ing at this address, the Cortex-M4 uses the System bus interface to fetch instructions. This results in reduced performance as the Cor-
tex-M4 accesses stack, other data in SRAM and peripherals using the System bus interface. To be able to run code from SRAM effi-
ciently, the SRAM is also mapped in the code space at address 0x10000000.
When running code from this space, the Cortex-M4 fetches instructions through the I/D-Code bus interface, leaving the System bus
interface for data access.
The SRAM mapped into the code space can however only be accessed by the CPU and not any other bus masters, e.g. DMA. See
4.5 SRAM for more detailed info on the system SRAM.
The Sequencer RAM is used by the Sequencer for both instructions and data. This RAM is also available for general use by most AHB
masters.
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