Register Configuration; Register Descriptions; Address Break Control Register (Abrkcr) - Hitachi H8/3664 Hardware Manual

4.1.2

Register Configuration

Table 4.1 shows the address break register configuration.
Table 4.1 Address Break Registers
Name
Address break control register
Address break status register
Break address register (H)
Break address register (L)
Break data register (H)
Break data register (L)
4.2

Register Descriptions

4.2.1

Address Break Control Register (ABRKCR)

Bit 7
RTINTE
Initial value 1
Read/Write R/W
ABRKCR is an 8-bit read/write register that sets address break conditions.
Bit 7—RTE Interrupt Enable (RTINTE): Bit 7 enables or disables an interrupt after RTE
instruction execution.
Bit 7: RTINTE
0
1
68
6
CSEL1 CSEL0
0
R/W R/W
Description
Disables an interrupt after RTE instruction execution (one instruction is
executed)
Enables an interrupt after RTE instruction execution
Abbrev. R/W
ABRKCR R/W
ABRKSR R/W
BARH R/W
BARL R/W
BDRH R/W
BDRL R/W
5 4
ACMP2 ACMP1
0 0
R/W
Initial Value
H'80
H'3F
H'FF
H'FF
Undefined
Undefined
3 2
ACMP0 DCMP1
0 0
R/W R/W
Address
H'FFC8
H'FFC9
H'FFCA
H'FFCB
H'FFCC
H'FFCD
1 0
DCMP0
0 0
R/W R/W
(Initial value)