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Bit 6—Address Break Interrupt Enable (ABIE): Bit 6 enables or disables an address break
interrupt.
Bit 6: ABIE
0
1
Bits 5 to 0—Reserved Bits: Bits 5 to 0 are reserved; they are always read as 1 and cannot be
modified.
4.2.3
Break Address Registers (BARH, BARL)
Bit
7
BARH7
Initial value
Read/Write
R/W
Bit
7
BARL7
Initial value
Read/Write
R/W
BAR (BARH, BARL) is a 16-bit read/write register that sets the address for generating an address
break interrupt. When setting the address break condition to the instruction execution cycle, set
the first byte address of the instruction.
Description
Disables an address break interrupt request
Enables an address break interrupt request
6
BARH6
BARH5
1
1
R/W
R/W
6
BARL6
BARL5
1
1
R/W
R/W
5
4
BARH4
BARH3
1
1
R/W
R/W
5
4
BARL4
BARL3
1
1
R/W
R/W
3
2
BARH2
BARH1
1
1
R/W
R/W
3
2
BARL2
BARL1
1
1
R/W
R/W
(Initial value)
1
0
BARH0
1
1
R/W
1
0
BARL0
1
1
R/W
71
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