•
Bits 5–3—Clock Select Bits (CKS2–CKS0)
Bit 5: CKS2
Bit 4: CKS1
0
0
1
1
0
1
•
Bits 2–0—Reserved bits: These bits always read 0.
7.2.6
Refresh Timer Counter (RTCNT)
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
The 8-bit counter RTCNT counts up with input clocks. The clock select bit of RTCSR selects an
input clock. RTCNT values can always be read/written by the CPU. When RTCNT matches
RTCOR, RTCNT is cleared. Returns to 0 after it counts up to 255.
•
Bits 15–8 always read 0.
Bit 3: CKS0
0
1
0
1
0
1
0
1
15
14
—
—
0
0
R
R
7
6
0
0
R/W
R/W
R/W
Description
Disables count up (Initial value)
CLK/4
CLK/16
CLK/64
CLK/256
CLK/1024
CLK/2048
CLK/4096
13
12
11
—
—
—
0
0
R
R
5
4
0
0
R/W
R/W
10
—
—
0
0
R
R
3
2
0
0
R/W
R/W
9
8
—
0
0
R
R
1
0
0
0
R/W
Hitachi 135