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7.2.3 Refresh Timer Counter (RTCNT)
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RTCNT is an 8-bit readable/writable up-counter.
Bit
Initial value
Read/Write
RTCNT is an up-counter that is incremented by an internal clock selected by bits CKS2 to CKS0
in RTMCSR. When RTCNT matches RTCOR (compare match), the CMF flag is set to 1 and
RTCNT is cleared to H'00.
RTCNT is write-disabled when the PSRAME bit or DRAME bit is set to 1. RTCNT is initialized
to H'00 by a reset and in standby mode.
7.2.4 Refresh Time Constant Register (RTCOR)
RTCOR is an 8-bit readable/writable register that determines the interval at which RTCNT is
compare matched.
Bit
Initial value
Read/Write
RTCOR and RTCNT are constantly compared. When their values match, the CMF flag is set to 1
in RTMCSR, and RTCNT is simultaneously cleared to H'00.
RTCOR is write-disabled when the PSRAME bit or DRAME bit is set to 1. RTCOR is initialized
to H'FF by a reset and in hardware standby mode. In software standby mode it retains its previous
value.
7
6
5
0
0
0
R/W
R/W
R/W
7
6
5
1
1
1
R/W
R/W
R/W
4
3
2
0
0
0
R/W
R/W
R/W
4
3
2
1
1
1
R/W
R/W
R/W
155
1
0
0
0
R/W
R/W
1
0
1
1
R/W
R/W
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