Run/Pause/Mixed Mode States; Breakpoints In Exception/Interrupt Handlers - Freescale Semiconductor NXP CodeWarrior USB TAP User Manual

Using the USB TAP
USB TAP System Startup

Run/Pause/Mixed Mode States

When the host debugger is connected to the target via the USB TAP, the USB TAP is
always in one of these states (modes): run, pause or mixed mode.
• Run mode — in this mode, all target system processor cores execute the target code
• Pause mode — in this mode, all target system processor cores have stopped
executing the target code
• Mixed mode — in this mode, some target system processor cores are in run mode
and others are in pause mode
The Run/Pause light on the USB TAP will be green in run mode, red in pause mode, and
orange in mixed mode.
Breakpoints in Exception/Interrupt
Handlers
Care must be taken when setting breakpoints in exception handler code. A typical
exception consists of a preamble that saves processor context, the actual exception
handler, and then a postamble that restores processor context. The rule is you can use
software breakpoints in the actual exception handler code, but not in the code where
processor context is being saved.
For PPC processors, placing the CPU into debug mode is just another interrupt. For
example: your code is in an interrupt epilogue and has just placed the return address into
SRR0 when a breakpoint occurs. The breakpoint causes the IP for the address of the
breakpoint to be written to SRR0, destroying your original return address. Stepping
through code which accesses SRR0 and SRR1 exhibits the same problem.
To avoid this problem, always set your breakpoints before or after code which accesses
SRR0 and SRR1, and never step through such code. For example, you can set your
breakpoint anywhere after the interrupt prologue, but before the epilogue.
Instructions that involve the SRR0 and SRR1 registers are "MTSPR SRR0/1,Rx"
"MFSPR Rx,SRR0/1," and "RFI."
16 USB TAP Users Guide