Dcmi Data Register (Dcmi_Dr); Dcmi Register Map; Table 54. Dcmi Register Map And Reset Values - ST STM32F207 Series Reference Manual

Advanced arm-based 32-bit mcus
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RM0033
12.8.11

DCMI data register (DCMI_DR)

Address offset: 0x28
Reset value: 0x0000 0x0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Byte3
r
r
r
r
r
r
r
Bits 31:24 Data byte 3
Bits 23:16 Data byte 2
The digital camera Interface packages all the received data in 32-bit format before
requesting a DMA transfer. A 4-word deep FIFO is available to leave enough time for DMA
transfers and avoid DMA overrun conditions.
12.8.12

DCMI register map

Table 54
Offset
Register
DCMI_CR
0x00
Reset value
DCMI_SR
0x04
Reset value
DCMI_RIS
0x08
Reset value
DCMI_IER
0x0C
Reset value
DCMI_MIS
0x10
Reset value
Byte2
r
r
r
r
r
r
Bits 15:8 Data byte 1
Bits 7:0 Data byte 0
summarizes the DCMI registers.

Table 54. DCMI register map and reset values

Reserved
Byte1
r
r
r
r
r
r
r
Reserved
Reserved
Reserved
Reserved
RM0033 Rev 9
Digital camera interface (DCMI)
9
8
7
6
5
r
r
r
r
r
r
r
FCR
EDM
C
0
0
0
0
0
0
0
4
3
2
1
0
Byte0
r
r
r
r
r
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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