Internal Block Diagram; Figure 1.1 Internal Block Diagram; Section 5 Interrupt Controller - Hitachi H8S/2628 Hardware Manual

1.2

Internal Block Diagram

MD2
MD1
MD0
EXTAL
XTAL
PLLCAP
PLLVSS
FWE/NC *
NMI
PF7/φ
PF6
PF5
PF4
PF3/ /
PF2
PF1
PF0/
P77
P76
P75/TMO3
P74/TMO2
P73/TMO1
P72/TMO0
P71/TMCI23/TMRI23
P70/TMCIO1/TMRIO1
Note: * The FWE pin is provided only in the flash memory version.
Rev. 1.0, 09/02, page 2 of 568
P
L
L
Interrupt controller
PC break controller
(2 channels)
ROM
(Masked ROM,
flash memory)
RAM
TPU
PPG
Port 1
The NC pin is provided only in the masked ROM version.

Figure 1.1 Internal Block Diagram

Port D
H8S/2600 CPU
DTC
WDT × 1 channel
TMR × 4 channels
SCI × 3 channels
SSU × 2 channels
HCAN × 1 channel
A/D converter
Port 4
PA3/SCK2
PA2/RxD2
PA1/TxD2
PA0
PB7/TIOCB5
PB6/TIOCA5
PB5/TIOCB4
PB4/TIOCA4
PB3/TIOCD3
PB2/TIOCC3
PB1/TIOCB3
PB0/TIOCA3
PC7/
PC6/SSCK1
PC5/SSI1
PC4/SSO1
PC3/
PC2/SSCK0
PC1/SSI0
PC0/SSO0
P37
P36
P35/
P34
P33
P32/SCK0/
P31/RxD0
P30/TxD0
P97/AN15
P96/AN14
P95/AN13
P94/AN12
P93/AN11
P92/AN10
P91/AN9
P90/AN8