Timer Function Control Register (Tfcr) - Hitachi H8/3032 Series Hardware Manual

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Bit 0—PWM Mode 0 (PWM0): Selects whether channel 0 operates normally or in PWM mode.
Bit 0
PWM0 Description
0 Channel 0 operates normally
1 Channel 0 operates in PWM mode
When bit PWM0 is set to 1 to select PWM mode, pin TIOCA0 becomes a PWM output pin. The
output goes to 1 at compare match with general register A0 (GRA0), and to 0 at compare match
with general register B0 (GRB0).

8.2.4 Timer Function Control Register (TFCR)

TFCR is an 8-bit readable/writable register that selects complementary PWM mode, reset-
synchronized PWM mode, and buffering for channels 3 and 4.
Bit 7
—
Initial value 1
Read/Write —
Reserved bits
TFCR is initialized to H'C0 by a reset and in standby mode.
Bits 7 and 6—Reserved: Read-only bits, always read as 1.
6 5 4 3
— CMD1 CMD0 BFB4
1 0 0 0
— R/W R/W R/W
Combination mode 1/0
These bits select complementary
PWM mode or reset-synchronized
PWM mode for channels 3 and 4
Buffer mode B4 and A4
These bits select buffering of
general registers (GRB4 and
GRA4) by buffer registers
(BRB4 and BRA4) in channel 4
187
(Initial value)
2 1 0
BFA4 BFB3 BFA3
0 0 0
R/W R/W R/W
Buffer mode B3 and A3
These bits select buffering
of general registers (GRB3
and GRA3) by buffer
registers (BRB3 and BRA3)
in channel 3