Operating Mode Descriptions; Mode 1; Mode 2; Mode 3 - Hitachi H8/3062 Hardware Manual

Single-chip microcomputer h8/3062 series; h8/3062b series; h8/3062f-ztat series; h8/3064f-ztat series
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3.4

Operating Mode Descriptions

3.4.1

Mode 1

Ports 1, 2, and 5 function as address pins A
address space. The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. If at least
one area is designated for 16-bit access in ABWCR, the bus mode switches to 16 bits.
3.4.2

Mode 2

Ports 1, 2, and 5 function as address pins A
address space. The initial bus mode after a reset is 16 bits, with 16-bit access to all areas. If all
areas are designated for 8-bit access in ABWCR, the bus mode switches to 8 bits.
3.4.3

Mode 3

Ports 1, 2, and 5 and part of port A function as address pins A
maximum 16-Mbyte address space. The initial bus mode after a reset is 8 bits, with 8-bit access to
all areas. If at least one area is designated for 16-bit access in ABWCR, the bus mode switches to
16 bits. A
to A
are valid when 0 is written in bits 7 to 5 of the bus release control register
23
21
(BRCR) (In this mode A
3.4.4

Mode 4

Ports 1, 2, and 5 and part of port A function as address pins A
maximum 16-Mbyte address space. The initial bus mode after a reset is 16 bits, with 16-bit access
to all areas. If all areas are designated for 8-bit access in ABWCR, the bus mode switches to
8 bits. A
to A
are valid when 0 is written in bits 7 to 5 of BRCR (In this mode A
23
21
used for address output).
3.4.5

Mode 5

Ports 1, 2, and 5 and part of port A can function as address pins A
maximum 16-Mbyte address space, but following a reset they are input ports. To use ports 1, 2,
and 5 as an address bus, the corresponding bits in their data direction registers (P1DDR, P2DDR,
and P5DDR) must be set to 1, setting ports 1, 2, and 5 to output mode. For A
0 in bits 7 to 4 of BRCR. The versions with on-chip flash memory support an on-board
programming mode in which the flash memory can be programmed. The initial bus mode after a
reset is 8 bits, with 8-bit access to all areas. If at least one area is designated for 16-bit access in
ABWCR, the bus mode switches to 16 bits.
72
to A
19
to A
19
is always used for address output).
20
, permitting access to a maximum 1-Mbyte
0
, permitting access to a maximum 1-Mbyte
0
to A
, permitting access to a
23
0
to A
, permitting access to a
23
0
to A
23
is always
20
, permitting access to a
0
to A
output, write
23
20

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