Reset Configuration Register (Rcon) - Freescale Semiconductor MCF5329 Reference Manual

Chip Configuration Module (CCM)
Field
2 Oscillator clock mode bit.
OSCMODE 0 Crystal oscillator mode
1 Oscillator bypass mode
1 PLL clock mode
PLLMODE 0 180/60 MHz operation
1 240/80 MHz operation
0 Reserved, should be set.
9.3.2

Reset Configuration Register (RCON)

At reset, RCON determines the default operation of certain chip functions. All default functions defined
by the RCON values can only be overridden during reset configuration (see
Configuration") if the external RCON pin is asserted. RCON is a read-only register and contains the same
fields as the CCR register. See
Address: 0xFC0A_0008 (RCON)
15 14 13
R
0 0 0
W
Reset 0 0 0
9.3.3 Chip Identification Register (CIR)
Address: 0xFC0A_000A (CIR)
15 14 13
R
W
Reset
Field
15–6 Part identification number. Contains a unique identification number for the device.
PIN 0x054 MCF5329
0x058 MCF53281
0x059 MCF5328
0x061 MCF5327
5–0 Part revision number. This number is increased by one for each new full-layer mask set of this part. The revision
PRN numbers are assigned in chronological order.
9-4
Table 9-3. CCR Field Descriptions (continued)
Table 9-3 for field descriptions.
12 11 10 9
0 0 0 CSC
0 0 0 1
Figure 9-3. Reset Configuration Register (RCON)
12 11 10 9
PIN
Device Dependent
Figure 9-4. Chip Identification Register (CIR)
Table 9-4. CIR Field Description
Description
MCF5329 Reference Manual, Rev 3
Description
Section 9.4.1, "Reset
8 7 6 5
0 LIMP LOAD BOOTPS
0 0 0 0
8 7 6 5
Access: Supervisor read-only
4 3 2 1
OSC PLL
MODE MODE
0 0 0 0
Access: Supervisor read-only
4 3 2 1
PRN
Mask Set Dependent
Freescale Semiconductor
0
1
1
0