Fast Ethernet Controller (FEC)
Internal Bus
Internal Bus
Interface
Bus
Controller
Descriptor
Controller
(RISC +
microcode)
The descriptor controller is a RISC-based controller providing these functions in the FEC:
•
Initialization (those internal registers not initialized by you or hardware)
•
High level control of the DMA channels (initiating DMA transfers)
•
Interpreting buffer descriptors
•
Address recognition for receive frames
•
Random number generation for transmit collision backoff timer
19-2
MIB
Counter RAM
Control/Status
Registers
MII
MDO
MDI
MDEN
I/O
PAD
FEC_MDIO
FEC_MDC
Figure 19-1. FEC Block Diagram
MCF5329 Reference Manual, Rev 3
FIFO
RAM
FIFO
Controller
RAM
Interface
Transmit
FEC_TXEN
FEC_TXCLK
FEC_TXD[3:0]
FEC_CRS
FEC_TXER
FEC_COL
MII/7-Wire data
option
Crossbar Switch
Master Bus
FEC DMA
FEC Bus
Receive
FEC_RXCLK
FEC_RXDV
FEC_RXD[3:0]
FEC_RXER
Freescale Semiconductor