Freescale Semiconductor MCF5329 Reference Manual page 732

UART Modules
Address: 0xFC06_000C (URB0)
0xFC06_400C (URB1)
0xFC06_800C (URB2)
7
R
W
Reset: 1
31.3.7 UART Transmit Buffers (UTBn)
The transmit buffers consist of the transmitter holding register and the transmitter shift register. The
holding register accepts characters from the bus master if UART's USRn[TXRDY] is set. A write to the
transmit buffer clears USRn[TXRDY], inhibiting any more characters until the shift register can accept
more data. When the shift register is empty, it checks if the holding register has a valid character to be sent
(TXRDY = 0). If there is a valid character, the shift register loads it and sets USRn[TXRDY] again. Writes
to the transmit buffer when the UART's TXRDY is cleared and the transmitter is disabled have no effect
on the transmit buffer.
Figure 31-9 shows UTBn. TB contains the character in the transmit buffer.
Address: 0xFC06_000C (UTB0)
0xFC06_400C (UTB1)
0xFC06_800C (UTB2)
7
R
W
Reset: 0
31.3.8 UART Input Port Change Registers (UIPCRn)
The UIPCRs hold the current state and the change-of-state for UnCTS.
Address: 0xFC06_0010 (UIPCR0)
0xFC06_4010 (UIPCR1)
0xFC06_8010 (UIPCR2)
7
R 0
W
Reset: 0
Figure 31-10. UART Input Port Changed Registers (UIPCRn)
31-12
6 5 4
1 1 1
Figure 31-8. UART Receive Buffer (URBn)
6 5 4
0 0 0
Figure 31-9. UART Transmit Buffer (UTBn)
6 5 4
0 0 COS
0 0 0
MCF5329 Reference Manual, Rev 3
3 2
RB
1 1
3 2
TB
0 0
3 2
1 1
1 1
Access: User read-only
1 0
1 1
Access: User write-only
1 0
0 0
Access: User read-only
1 0
1 CTS
1 UnCTS
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