Introduction - Freescale Semiconductor MCF5329 Reference Manual

Chapter 11
System Control Module (SCM)
11.1

Introduction

This system control module (SCM) provides several control functions, including peripheral access control,
a software core watchdog timer, and generic access error information for the processor core.
11.1.1 Overview
The SCM provides programmable access protections for both masters and peripherals. It allows the
privilege level of a master to be overridden, forcing it to user-mode privilege, and allows masters to be
designated as trusted or untrusted. Peripherals may be programmed to require supervisor privilege level
for access, may restrict access to a trusted master only, and may be write-protected.
The SCM's core watchdog timer (CWT) provides a means of preventing system lockup due to
uncontrolled software loops via a special software service sequence. If periodic software servicing action
does not occur, the CWT times out with a programmed response (system reset or interrupt) to allow
recovery or corrective action to be taken.
The core watchdog timer is available to provide compatibility with the
watchdog timer implemented on previous ColdFire devices. However, there
is a second watchdog timer available that has new features. See
"Watchdog Timer Module,"
Fault access reporting is also available within the SCM. The user can use these registers during the
resulting interrupt service routine and perform an appropriate recovery.
11.1.2 Features
The SCM includes these distinctive features:
• Access control registers
— Master privilege registers (MPR0 and MPR1)
— Peripheral access control registers (PACRs)
• System control registers
— Core watchdog control register (CWCR) for watchdog timer control
— Core watchdog service register (CWSR) to service watchdog timer
— SCM interrupt status register (SCMISR) to service a bus fault or watchdog interrupt
— Bus monitor timeout register (BMT)
Freescale Semiconductor
NOTE
for more information.
MCF5329 Reference Manual, Rev 3
Chapter 27,
11-1