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Message Digest Hardware Accelerator (MDHA)
33.3.3.1
Address Decoder
The address decoder drives out the proper data from the module or captures incoming data into the
appropriate register.
33.3.3.2
Interface Control
The interface block decodes the MDMR and outputs all control signals to all other blocks. Control signals
are received from other modules to send a pop signal to the FIFO.
33.3.3.3
Auto-Padder
The auto-padder takes longwords in from the FIFO and then passes it directly to the engine or pads the
word according to the control bits that are set. The IPAD and OPAD is done to all longwords in this block
before they are passed directly to the engine. This block takes care of passing the proper data to the engine
for the EHMAC mode of operation. This is done by an internal counter that leaves 351 bits in the input
FIFO.
33.3.3.4
Hashing Engine
This module is the core of the Message Digest Hardware Accelerator that is capable of computing the
Secure Hash Algorithm (SHA-1) or Message Digest 5 (MD5).
33.3.3.5
Hashing Engine Control
This module is the control unit of the MDHA that is capable of computing the Secure Hash Algorithm
(SHA-1) and Message Digest 5 algorithm (MD5). This module keeps track of all rounds and tells the rest
of the module when the operation has been completed.
33.3.3.6
DMA Request Control
This module is the control for the DMA request signal. It monitors the FIFO level and DMA request level
and determines when the DMA request signal should be asserted and de-asserted.
33.3.3.7
Status Interrupt
This block generates the error interrupt if the host performs an illegal operation. The cause of the error is
flagged in the MDISR
(Section 33.2.5, "MDHA Interrupt Status & Mask Registers (MDISR and
MDIMR)"). If an error occurs, the MDHA core engine is halted. This prevents the core from continuing
operation with invalid data.
33.4
Initialization/Application Information
33.4.1
Performing a Standard HASH Operation
1. Reset the MDHA using the MDCMR[SWR] bit.
2. MDCR register write. Enable the interrupts. (optional)
33-14
MCF5329 Reference Manual, Rev 3
Freescale Semiconductor
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