Freescale Semiconductor MCF5329 Reference Manual page 769

TX
Last Byte
Transmitted
?
N
RXAK= 0
?
Y
End of
Y
ADDR Cycle
(Master RX)
?
N
Write Next
Byte to I2DR
Switch to
Rx Mode
Generate
Dummy Read
from I2DR STOP Signal
Freescale Semiconductor
Y
TX/Rx RX
?
Y
Last
Byte to be
N Y
?
Read
N
2nd Last
Byte to be
Y
Read?
N
Generate
Set TXAK =1
STOP Signal
Read Data
from I2DR
And Store
Figure 32-14. Flow-Chart of Typical I
MCF5329 Reference Manual, Rev 3
Clear
IIF
N
Master
Mode?
Clear IAL
N
IAAS=1
?
Y
Address
Cycle
(Read) Y
SRW=1
?
(WRITE)
N
Set TX
Mode
Write Data
to I2DR
Set RX
Mode
Dummy Read
from I2DR
RTE
2
C Interrupt Routine
2
I C Interface
Y
Arbitration
Lost?
N
Y
IAAS=1
?
N
Data
Cycle
Tx/Rx
RX
?
TX
Y ACK from
Receiver
?
N
Read Data
Tx Next
from I2DR
Byte
and Store
Switch to
Rx Mode
Dummy Read
from I2DR
32-15