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Universal Serial Bus Interface – On-The-Go Module
Table 21-41. USB Network Speed and Required Physical Interface
USB Mode and Speed
USB Host FS/LS
USB Device FS
Host/Device ULPI HS/FS
21.4.4.1
USB On-Chip Transceiver Required External Components
USB system operation does not require external components. However, the recommended method ensures
driver output impedance, eye diagram, and V
recommended method is for the DM and DP I/O pads to connect through series resistors (approximately
33 Ω each) to the USB connector on the application printed circuit board (PCB). Additionally, signal
quality optimizes when these 33 Ω resistors are mounted close to the processor rather than closer to the
USB board level connector.
Internal pull-down resistors are included that keep the DP and DM ports in
a known quiescent state when the USB port is not used or when a USB cable
is not connected.
Further, host operation requires 15k Ω external resistors to be connected
from DP and DM ports to ground. Device operation requires a 1.5k Ω
pull-up resistor on DP (full-speed operation). The other end of this pull-up
resistor should be controlled by an open-drain, low impedence output pin
with a 3.3V I/O power supply. Readers are directed to section 7.1.5.1 of the
USB 2.0 specification.
21.5
Initialization/Application Information
21.5.1
Host Operation
Enhanced Host Controller Interface (EHCI) Specification defines the general operational model for the
USB modules in host mode. The EHCI specification describes the register-level interface for a host
controller for USB Revision 2.0. It includes a description of the hardware/software interface between
system software and host controller hardware. The next section has information about the initialization of
the USB modules; however, full details of the EHCI specification are beyond the scope of this document.
21.5.1.1
Host Controller Initialization
After initial power-on or module reset (via the USBCMD[RST] bit), all of the operational registers are at
default values, as illustrated in the register memory map in
21-46
DP and DN
2
On-Chip Analog
I
C FEC
XCVR Active
Yes
No
Yes See
Yes
No
Yes See
No
Yes
No Maxim
cable fault tolerance requirements are met. The
BUS
NOTE
MCF5329 Reference Manual, Rev 3
External Integrated Circuit Required
Section 21.4.4.1, "USB On-Chip Transceiver
Required External Components"
Section 21.4.4.1, "USB On-Chip Transceiver
Required External Components"
Table
21-4.
Freescale Semiconductor
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