Freescale Semiconductor MCF5329 Reference Manual page 481

Devices supported: mcf5327; mcf5328; mcf53281; mcf5329
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Field
2
Endian select. Controls the byte ordering of the transfer buffers to match the host microprocessor bus architecture.
ES
The bit fields in the register interface and the DMA data structures (including the setup buffer within the device QH)
are unaffected by the value of this bit, because they are based upon 32-bit words.
0 Little endian. First byte referenced in least significant byte of 32-bit word.
1 Big endian. First byte referenced in most significant byte of 32-bit word.
Note: For proper operation, this bit must be set for this ColdFire device.
1–0
Controller mode. This register can be written only once after reset. If necessary to switch modes, software must
CM
reset the controller by writing to the USBCMD[RST] bit before reprogramming this register.
00 Idle (default for the USB OTG module)
01 Reserved
10 Device controller
11 Host controller (default for the USB host module)
Note: The USB OTG module must be initialized to the desired operating mode after reset.
21.3.3.17 Endpoint Setup Status Register (EPSETUPSR)
This register is not defined in the EHCI specification. This register contains the endpoint setup status and
is used only by the USB OTG module in device mode.
Address: 0xFC0B_01AC (EPSETUPSR)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 21-31. Endpoint Setup Status Register (EPSETUPSR)
Field
31–4
Reserved, must be cleared.
3–0
Setup endpoint status. For every setup transaction received, a corresponding bit in this field is set.
EPSETUPSTAT
Software must clear or acknowledge the setup transfer by writing a 1 to a respective bit after it has read
the setup data from the queue head. The response to a setup packet, as in the order of operations and
total response time, is crucial to limit bus time outs while the setup lockout mechanism engages.
21.3.3.18 Endpoint Initialization Register (EPPRIME)
This register is not defined in the EHCI specification. This register is used to initialize endpoints and is
used only by the USB OTG module in device mode.
Address: 0xFC0B_01B0 (EPPRIME)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
R 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Freescale Semiconductor
Table 21-33. USBMODE Field Descriptions (continued)
Table 21-34. EPSETUPSR Field Descriptions
PETB
Figure 21-32. Endpoint Initialization Register (EPPRIME)
MCF5329 Reference Manual, Rev 3
Universal Serial Bus Interface – On-The-Go Module
Description
9
Description
9
0 0 0 0 0 0 0 0 0 0 0 0
Access: User read/write
8
7
6
5
4
3
2
1
EPSETUPSTAT
0
0
0
Access: User read/write
8
7
6
5
4
3
2
1
PERB
0
0
0 0
21-39
0
0
0

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