Freescale Semiconductor MCF5329 Reference Manual page 475

Field
19–16 Port test control. Any value other than 0 indicates the port operates in test mode. Refer to Chapter 7 of the USB
PTC Specification Revision 2.0 for details on each test mode.
0000 Not enabled.
0001 J_STATE
0010 K_STATE
0011 SEQ_NAK
0100 Packet
0101 FORCE_ENABLE_HS
0110 FORCE_ENABLE_FS
0111 FORCE_ENABLE_LS
Else Reserved.
Note: The FORCE_ENABLE_FS and FORCE ENABLE_LS settings are extensions to the test mode support in the
EHCI specification. Writing the PTC field to any of the FORCE_ENABLE values forces the port into the
connected and enabled state at the selected speed. Then clearing the PTC field allows the port state
machines to progress normally from that point.
15–14 Port indicator control. Controls the link indicator signals and is valid for host mode only. Refers to the USB
PIC Specification Revision 2.0 for a description on how these bits are used.
00 Off
01 Amber
10 Green
11 Undefined
This field is output from the module on the USB port control signals for use by an external LED driving circuit. For
this device, the port indicator signals are implemented as status bits within the CCM.
13 Port owner. Port owner handoff is not implemented in this design, therefore this bit is read-only and is always
PO cleared.
12 Port power. Represents the current setting of the port power control switch (0 equals off, 1 equals on). When power
PP is not available on a port (PP = 0), it is non-functional and does not report attaches, detaches, etc.
When an over-current condition is detected on a powered port, the host controller driver from a 1to a 0 (removing
power from the port) transitions the PP bit in each affected port.
11–10 Line status. Reflects current logical levels of the USB DP (bit 11) and DM (bit 10) signal lines. In host mode, the line
LS status by the host controller driver is not necessary (unlike EHCI) because hardware manages the connection of FS
and LS. In device mode, LS by the device controller is not necessary.
00 SE0
01 J-state
10 K-state
11 Undefined
9 High speed port. Indicates if the host/device connected is in high speed mode.
HSP 0 FS or LS
1 HS
Note: This bit is redundant with the PSPD bit field.
8 Port reset. This field is cleared if the PP bit is cleared.
PR Host mode (USB host and USB OTG):
When software sets this bit the bus-reset sequence as defined in the USB Specification Revision 2.0 starts. This
bit automatically clears after the reset sequence completes. This behavior is different from EHCI where the host
controller driver is required to clear this bit after the reset duration is timed in the driver.
Device mode (USB OTG only):
This bit is a read-only status bit. Device reset from the USB bus is also indicated in the USBSTS register.
0 Port is not in reset.
1 Port is in reset.
Freescale Semiconductor
Table 21-31. PORTSC1 Field Descriptions (continued)
MCF5329 Reference Manual, Rev 3
Universal Serial Bus Interface – On-The-Go Module
Description
21-33