Matching Process - Freescale Semiconductor MCF5329 Reference Manual

Devices supported: mcf5327; mcf5328; mcf53281; mcf5329
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FlexCAN

23.3.14 Matching Process

The matching process is an algorithm that scans the entire MB memory looking for Rx MBs programmed
with the same ID as the one received from the CAN bus. Only MBs programmed to receive participate in
the matching process for received frames.
While the ID, DLC and data fields are retrieved from the CAN bus, they are stored temporarily in the serial
message buffer
(Section 23.3.15.1, "Serial Message Buffers
(SMBs)"). The matching process takes place
during the CRC field. If a matching ID is found in one of the MBs, the contents of the SMB are transferred
to the matched MB during the sixth bit of the end-of-frame field of the CAN protocol. This operation is
called move-in. If any protocol error (CRC, ACK, etc.) is detected, than the move-in operation does not
happen.
An MB with a matching ID is free to receive a new frame if the MB is not locked (see
Section 23.3.15.3,
"Locking and Releasing Message
Buffers"). The CODE field is EMPTY, FULL, or OVERRUN but the
CPU has already serviced the MB (read the C/S word and then unlocked the MB).
Matching to a range of IDs is possible by using ID acceptance masks. FlexCAN supports a masking
scheme with three mask registers (RXGMASK, RX14MASK, and RX15MASK). During the matching
algorithm, if a mask bit is asserted, then the corresponding ID bit is compared. If the mask bit is negated,
the corresponding ID bit is don't care.
23.3.15 Message Buffer Managing
To maintain data coherency and FlexCAN proper operation, the CPU must obey the rules described in
Section 23.3.11, "Transmit Process"
and
Section 23.3.13, "Receive Process."
Any form of CPU accessing
a MB structure within FlexCAN other than those specified may cause FlexCAN to behave in an
unpredictable way.
23.3.15.1 Serial Message Buffers (SMBs)
To allow double buffering of messages, the FlexCAN has two shadow buffers called serial message
buffers. These two buffers are used by the FlexCAN for buffering received messages and messages to be
transmitted. Only one SMB is active at a time, and its function depends upon the operation of the FlexCAN
at that time. At no time does the user have access to or visibility of these two buffers.
23.3.15.2 Message Buffer Deactivation
If the CPU wants to change the function of an active MB, the recommended procedure is to put the module
into freeze mode and then change the CODE field of that MB. This is a safe procedure because the
FlexCAN waits for pending CAN bus and MB moving activities to finish before entering freeze mode.
Nevertheless, a mechanism is provided to maintain data coherence when the CPU writes to the control and
status word of active MBs out of freeze mode.
Any CPU write access to the C/S word of an MB causes that MB to be excluded from the transmit or
receive processes during the current matching or arbitration round. This mechanism is called MB
deactivation. It is temporary, affecting only for the current match/arbitration round.
MCF5329 Reference Manual, Rev 3
Freescale Semiconductor
23-23

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