Freescale Semiconductor MCF5329 Reference Manual page 256

Devices supported: mcf5327; mcf5328; mcf53281; mcf5329
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General Purpose I/O Module
13.3.5.7
UART Pin Assignment Register (PAR_UART)
The PAR_UART register controls the functions of the UART pins.
Address: 0xFC0A_4058 (PAR_UART)
15
14
13
R
0
0
0
W
Reset
0
0
0
Field
15–12
Reserved, should be cleared.
11–10
UART1 control pin assignment. These bit fields configure the UART1 pins for one of their primary functions or GPIO.
PAR_U1CTS
9–8
PAR_U1RTS
7–6
PAR_U1RXD
5–4
PAR_U1TXD
3
U0CTS pin assignment.
PAR_U0CTS
0 U0CTS pin configured for GPIO
1 U0CTS pin configured for UART0 CTS function
2
U0RTS pin assignment.
PAR_U0RTS
0 U0RTS pin configured for GPIO
1 U0RTS pin configured for UART0 RTS function
1
U0RXD pin assignment.
PAR_U0RXD
0 U0RXD pin configured for GPIO
1 U0RXD pin configured for UART0 RXD function
0
U0TXD pin assignment.
PAR_U0TXD
0 U0TXD pin configured for GPIO
1 U0TXD pin configured for UART0 TXD function
13-28
12
11
10
9
0
PAR_U1CTS PAR_U1RTS
0
0
0
0
0
Figure 13-40. UART Pin Assignment (PAR_UART)
Table 13-14. PAR_UART Field Descriptions
PAR_U1CTS PAR_U1RTS PAR_U1RXD PAR_U1TXD
00
GPIO
01
Reserved
10
SSI_BCLK
11
U1CTS
MCF5329 Reference Manual, Rev 3
8
7
6
5
PAR_U1RXD
PAR_U1TXD
0
0
0
Description
GPIO
GPIO
Reserved
Reserved
SSI_FS
SSI_RXD
U1RTS
U1RXD
Access: User read/write
4
3
2
1
PAR_
PAR_
PAR_
U0CTS
U0RTS
U0RXD
0
0
0
0
GPIO
Reserved
SSI_TXD
U1TXD
Freescale Semiconductor
0
PAR_
U0TXD
0

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