Freescale Semiconductor MCF5329 Reference Manual page 261

13.3.5.13 LCD Controller Control Pin Assignment Register (PAR_LCDCTL)
The PAR_LCDCTL register controls the functions of the LCDC control pins.
Address: 0xFC0A_405E (PAR_LCDCTL)
15 14 13
R 0 0 0
W
Reset 0 0 0
Figure 13-46. LCD Control Pin Assignment (PAR_LCDCTL)
Field
15–9 Reserved, should be cleared.
8 LCD_ACD/OE pin assignment.
PAR_ACD_OE 0 LCD_ACD/OE pin configured as GPIO.
1 LCD_ACD/OE pin configured for LCD controller ACD/OE function.
7 LCD_FLM/VSYNC pin assignment.
PAR_FLM_VSYNC 0 LCD_FLM/VSYNC pin configured as GPIO.
1 LCD_FLM/VSYNC pin configured for LCD controller FLM/VSYNC function.
6 LCD_LP/HSYNC pin assignment.
PAR_LP_HSYNC 0 LCD_LP/HSYNC pin configured as GPIO.
1 LCD_LP/HSYNC pin configured for LCD controller LP/HSYNC function.
5 LCD_LSCLK pin assignment.
PAR_LSCLK 0 LCD_LSCLK pin configured as GPIO.
1 LCD_LSCLK pin configured for LCD controller LSCLK function.
4 LCD_CONTRAST pin assignment.
PAR_CONTRAST 0 LCD_CONTRAST pin configured as GPIO.
1 LCD_CONTRAST pin configured for LCD controller CONTRAST function.
3 LCD_SPL_SPR pin assignment.
PAR_SPL_SPR 0 LCD_SPL_SPR pin configured as GPIO.
1 LCD_SPL_SPR pin configured for LCD controller ACD/OE function.
2 LCD_REV pin assignment.
PAR_REV 0 LCD_REV pin configured as GPIO.
1 LCD_REV pin configured for LCD controller REV function.
1 LCD_PS pin assignment.
PAR_PS 0 LCD_PS pin configured as GPIO.
1 LCD_PS pin configured for LCD controller PS function.
0 LCD_CLS pin assignment.
PAR_CLS 0 LCD_CLS pin configured as GPIO.
1 LCD_CLS pin configured for LCD controller CLS function.
Freescale Semiconductor
12 11 10 9 8
0 0 0 0 PAR_
ACD_
OE
0 0 0 0 0
Table 13-20. PAR_LCDCTL Field Descriptions
MCF5329 Reference Manual, Rev 3
7 6 5
PAR_ PAR_ PAR_
PAR_
FLM_ LP_ CON
LSCLK
VSYNC HSYNC TRAST
0 0 0
Description
General Purpose I/O Module
Access: User read/write
4 3 2 1 0
PAR_
PAR_ PAR_ PAR_
SPL_
REV PS CLS
SPR
0 0 0 0 0
13-33