Freescale Semiconductor MCF5329 Reference Manual page 886

Register Memory Map Quick Reference
1
Address
0xFC05_C000 QSPI Mode Register (QMR)
0xFC05_C004 QSPI Delay Register (QDLYR)
0xFC05_C008 QSPI Wrap Register (QWR)
0xFC05_C00C QSPI Interrupt Register (QIR)
0xFC05_C010 QSPI Address Register (QAR)
0xFC05_C014 QSPI Data Register (QDR)
1
Addresses not assigned to a register and undefined register bits are reserved for expansion.
2
See the register description for special cases. Some bits may be read- or write-only.
Address
UART0
UART1
UART2
0xFC06_0000 UART Mode Registers
0xFC06_4000
0xFC06_8000
0xFC06_0004 UART Status Register (USRn)
0xFC06_4004
UART Clock Select Register
0xFC06_8004
0xFC06_0008 UART Command Registers (UCRn)
0xFC06_4008
0xFC06_8008
0xFC06_000C UART Receive Buffers (URBn)
0xFC06_400C
UART Transmit Buffers (UTBn)
0xFC06_800C
0xFC06_0010 UART Input Port Change Register (UIPCRn)
0xFC06_4010
UART Auxiliary Control Register (UACRn)
0xFC06_8010
0xFC06_0014 UART Interrupt Status Register (UISRn)
0xFC06_4014
UART Interrupt Mask Register (UIMRn)
0xFC06_8014
0xFC06_0018 UART Baud Rate Generator Register (UBG1n)
0xFC06_4018
0xFC06_8018
0xFC06_001C UART Baud Rate Generator Register (UBG2n)
0xFC06_401C
0xFC06_801C
A-10
Table A-14. QSPI Memory Map
Register
Table A-15. UART Module Memory Map
Register
1
(UMR1n), (UMR2n)
1
(UCSRn)
MCF5329 Reference Manual, Rev 3
Width
Access Reset Value
(bits)
16 R/W 0x0104
16 R/W 0x0404
2
16 R/W 0x0000
2
16 R/W 0x0000
2
16 R/W 0x0000
16 R/W 0x0000
Width
Access Reset Value Section/Page
(bit)
8 R/W 0x00
8 R 0x00
8 W See Section
8 W 0x00
8 R 0xFF
8 W 0x00
8 R See Section
8 W 0x00
8 R 0x00
8 W 0x00
2
8 W 0x00
2
8 W 0x00
Freescale Semiconductor
Section/Page
30.3.1/30-3
30.3.2/30-5
30.3.3/30-6
30.3.4/30-6
30.3.5/30-7
30.3.6/30-8
31.3.1/31-5
31.3.2/31-6
31.3.3/31-8
31.3.4/31-9
31.3.5/31-9
31.3.6/31-11
31.3.7/31-12
31.3.8/31-12
31.3.9/31-13
31.3.10/31-13
31.3.10/31-13
31.3.11/31-15
31.3.11/31-15